Liitja/lahutaja
);
end Summator;
-- Architecture
architecture adder_4bit_arc of Summator is
-- XOR Gate komponent
component xorGate is
-- Sisend/väljund portide kirjeldus
port ( A, B : in bit;
F : out bit );
end component;
-- Täissummaator komponent
component FullAdder is
-- Sisend/väljund portide kirjeldus
port ( a, b, c_in, s : in bit;
c_out, y : out bit );
end component;
-- Signaalid
signal carry : bit_vector(2 downto 0);
signal xor0, xor1, xor2, xor3, xor4 : bit;
begin
-- Alamkomponentide kirjeldused
XG0 : xorGate port map (subtract,B(0),xor0);
XG1 : xorGate port map (subtract,B(1),xor1);
XG2 : xorGate port map (subtract,B(2),xor2);
XG3 : xorGate port map (subtract,B(3),xor3);
XG4 : xorGate port map (subtract,carry_in,xor4);
FA0 : FullAdder port map (A(0),xor0,xor4,carry(0),Y(0));
FA1 : FullAdder port map (A(1),xor1,carry(0),carry(1),Y(1));
annaabi.ee 
