-- Sisend/väljund portide kirjeldus port ( A, B : in bit; F : out bit ); end component; -- Täissummaator komponent component FullAdder is -- Sisend/väljund portide kirjeldus port ( a, b, c_in, s : in bit; c_out, y : out bit ); end component; -- Signaalid signal carry : bit_vector(2 downto 0); signal xor0, xor1, xor2, xor3, xor4 : bit; begin -- Alamkomponentide kirjeldused XG0 : xorGate port map (subtract,B(0),xor0); XG1 : xorGate port map (subtract,B(1),xor1); XG2 : xorGate port map (subtract,B(2),xor2); XG3 : xorGate port map (subtract,B(3),xor3); XG4 : xorGate port map (subtract,carry_in,xor4); FA0 : FullAdder port map (A(0),xor0,xor4,carry(0),Y(0)); FA1 : FullAdder port map (A(1),xor1,carry(0),carry(1),Y(1)); FA2 : FullAdder port map (A(2),xor2,carry(1),carry(2),Y(2)); FA3 : FullAdder port map (A(3),xor3,carry(2),carry_out,Y(3));
Maksimaalse pusiluhisvoolu arvutamine (Cmax=1,1) Vastastiktakistustega aseskeem XG11 = 1.208 XG21 = 0.586 X.G2K = 0.269 XQ1 = 0.399 XM1 = 4.268 Maksimaalsed ulimooduvad voolud harudes: Cmax 1.1 3 3 I.G1 IbI I.G1 5.249 × 10 I.G1 = 4.781 × 10 XG1 0.343 Cmax 1.1 3 3 I.G2 I I.G2 5.249 × 10 I.G2 = 21.479 × 10 XG2K bI 0.269 Cmax 1.1 3 3 I.Q IbI I.Q 5.249 × 10 I.Q = 14.466 × 10 XQ1 0.399
annaabi.ee 
