The circuit diagram: 7. The run-up phase takes 400 µs, the run-down phase takes 1 ms. 8. a) MAX1200 pipeline ADC - -85dB b) MAX1201 pipeline ADC - -85dB c) MAX1205 pipeline ADC - -84dB 9. A) Flash ADC expensive, high power consumption B) SAR ADC speed is limited, needs anti-aliasing filter C) Dual-Slope ADC slow conversion, expensive external components required (high accuary components) D) Sigma-Delta ADC multibit ADC and multibit feedback DAC higher order 10. a) SAR b) +- 0,4 LSB c) 1,4 ms d) 8,4 us 11. Output voltage is 3,925V 12. Output voltage is 5,67V 13. The resolution of a 16bit DAC is 65536 bits 14. Gain error, offset error, resolution, monotonicity, accuary (relative) 15. A) 1,25 B) 3,125 C) 1,875 16. The advantages of PWM systems:
The run-down phase takes 1 ms. Question 8 What is the typical performance in terms of THD at a frequency of 500 kHz of: a) MAX1200 pipeline ADC. -85dB b) MAX1201 pipeline ADC. -85dB c) MAX1205 pipeline ADC. -84dB Question 9 Name two disadvantages of: a) Flash ADC - expensive, high power consumption b) SAR ADC - speed is limited, needs anti-aliasing filter c) Dual-slope ADC -slow conversion, expensive external components required (high accuary components) a) Sigma Delta ADC -multibit ADC and multibit feedback DAC – higher order Question 10 Find the following for the built-in ADC in the PIC18F45K20: a) Architecture - SAR(Succesive Approximation Register) b) Differential linearity - +- 0.4 LSB c) Minimum acquisition time – 1.4ms d) Minimum conversion time – 8.4 𝜇𝑠 Question 11 A 10 bit DAC has a reference voltage of 5.12V. What is the output voltage for a binary input code of 11000100012
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